"FPGA-based hardware-in-the-loop for multi-domain simulation."

Abdelouahab D. Benhamadouche et al. (2019)

> Home

Details and statistics

DOI: 10.1142/S179396231950020X

access: closed

type: Journal Article

metadata version: 2020-10-26

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - journals/ijmssc/BenhamadoucheDB19
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/journals/ijmssc/BenhamadoucheDB19
Abdelouahab D. Benhamadouche, Farid Djahli, Adel Ballouti, Abdeslem Sahli:
FPGA-based hardware-in-the-loop for multi-domain simulation. Int. J. Model. Simul. Sci. Comput. 10(4): 1950020:1-1950020:18 (2019)

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.