"A high-speed and high-performance full adder cell based on 32-nm CNFET ..."

Yavar Safaei Mehrabani, Zahra Zareei, Ahmad Khademzadeh (2013)

> Home

Details and statistics

DOI: 10.1504/IJHPSA.2013.058975

access: closed

type: Journal Article

metadata version: 2020-03-24

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - journals/ijhpsa/MehrabaniZK13
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/journals/ijhpsa/MehrabaniZK13
Yavar Safaei Mehrabani, Zahra Zareei, Ahmad Khademzadeh:
A high-speed and high-performance full adder cell based on 32-nm CNFET technology for low voltages. Int. J. High Perform. Syst. Archit. 4(4): 196-203 (2013)

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.