"A 6-to-38Gb/s capture-range bang-bang clock and data recovery circuit with ..."

Lin Wang et al. (2023)

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DOI: 10.1002/CTA.3535

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type: Journal Article

metadata version: 2023-06-23

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Lin Wang, Yong Chen, Chaowei Yang, Xionghui Zhou, Mei Han, Paolo Stefano Crovetti, Pui-In Mak, Rui Paulo Martins:
A 6-to-38Gb/s capture-range bang-bang clock and data recovery circuit with deliberate-current-mismatch frequency detection and interpolation-based multiphase clock generation. Int. J. Circuit Theory Appl. 51(5): 1988-2015 (2023)

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