"An all-hardware implementation of the subpixel refinement stage in SIFT ..."

Pablo Rubio-Ibáñez et al. (2018)

> Home

Details and statistics

DOI: 10.1002/CTA.2482

access: closed

type: Journal Article

metadata version: 2023-09-30

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - journals/ijcta/Rubio-IbanezRDM18
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/journals/ijcta/Rubio-IbanezRDM18
Pablo Rubio-Ibáñez, Ramón Ruiz Merino, Ginés Doménech-Asensi, J. Javier Martínez-Álvarez, Juan Zapata-Pérez, José Ángel Díaz-Madrid, José-Alejandro López Alcantud:
An all-hardware implementation of the subpixel refinement stage in SIFT algorithm. Int. J. Circuit Theory Appl. 46(9): 1690-1702 (2018)

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.