"TMA: Tera-MACs/W neural hardware inference accelerator with a ..."

Hyunbin Park, Dohyun Kim, Shiho Kim (2021)

> Home

Details and statistics

DOI: 10.1002/CTA.2917

access: closed

type: Journal Article

metadata version: 2023-10-24

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - journals/ijcta/ParkKK21
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/journals/ijcta/ParkKK21
Hyunbin Park, Dohyun Kim, Shiho Kim:
TMA: Tera-MACs/W neural hardware inference accelerator with a multiplier-less massive parallel processor. Int. J. Circuit Theory Appl. 49(5): 1399-1409 (2021)

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.