"A 10 b 25 MS/s 4.8 mW 0.13 µm CMOS ADC with switched-bias ..."

Hee-Cheol Choi et al. (2009)

> Home

Details and statistics

DOI: 10.1002/CTA.519

access: closed

type: Journal Article

metadata version: 2020-05-11

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - journals/ijcta/ChoiKLKL09
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/journals/ijcta/ChoiKLKL09
Hee-Cheol Choi, Young-Ju Kim, Kyung-Hoon Lee, Younglok Kim, Seung-Hoon Lee:
A 10 b 25 MS/s 4.8 mW 0.13 µm CMOS ADC with switched-bias power-reduction techniques. Int. J. Circuit Theory Appl. 37(9): 955-967 (2009)

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.