"Divide-by-16/17 dual modulus prescaler design with enhanced speed in a ..."

Uma Nirmal, V. K. Jain (2021)

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DOI: 10.1504/IJCAET.2021.114490

access: closed

type: Journal Article

metadata version: 2021-05-25

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Uma Nirmal, V. K. Jain:
Divide-by-16/17 dual modulus prescaler design with enhanced speed in a 180nm CMOS technology. Int. J. Comput. Aided Eng. Technol. 14(3): 345-357 (2021)

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