"Fault-tolerance techniques for hybrid CMOS/nanoarchitecture."

Aissa Melouki, Saket Srivastava, Bashir M. Al-Hashimi (2010)

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DOI: 10.1049/IET-CDT.2008.0146

access: closed

type: Journal Article

metadata version: 2020-07-14

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Aissa Melouki, Saket Srivastava, Bashir M. Al-Hashimi:
Fault-tolerance techniques for hybrid CMOS/nanoarchitecture. IET Comput. Digit. Tech. 4(3): 240-250 (2010)

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