"Code Efficiency Evaluation for Embedded Processors."

Morgan Hirosuke Miki et al. (2002)

> Home

Details and statistics

DOI: —

access: closed

type: Journal Article

metadata version: 2021-06-09

- view
  - electronic edition @ ieice.org
- export record
  dblp key:
  - journals/ieiceta/MikiSMTYS02
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/journals/ieiceta/MikiSMTYS02
Morgan Hirosuke Miki, Mamoru Sakamoto, Shingo Miyamoto, Yoshinori Takeuchi, Toyohiko Yoshida, Isao Shirakawa:
Code Efficiency Evaluation for Embedded Processors. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 85-A(4): 811-818 (2002)

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.