"A High-Speed and Low-Power Clock Tree Synthesis by Dynamic Clock Scheduling."

Keiichi Kurokawa et al. (2002)

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DOI: —

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type: Journal Article

metadata version: 2021-06-09

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Keiichi Kurokawa, Takuya Yasui, Yoichi Matsumura, Masahiko Toyonaga, Atsushi Takahashi:
A High-Speed and Low-Power Clock Tree Synthesis by Dynamic Clock Scheduling. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 85-A(12): 2746-2755 (2002)

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