"0.3-1.5 V Embedded SRAM Core with Write-Replica Circuit Using Asymmetrical ..."

Toshikazu Suzuki et al. (2005)

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DOI: 10.1093/IETELE/E88-C.4.630

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type: Journal Article

metadata version: 2024-02-05

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Toshikazu Suzuki, Yoshinobu Yamagami, Ichiro Hatanaka, Akinori Shibayama, Hironori Akamatsu, Hiroyuki Yamauchi:
0.3-1.5 V Embedded SRAM Core with Write-Replica Circuit Using Asymmetrical Memory Cell and Source-Level-Adjusted Direct-Sense-Amplifier. IEICE Trans. Electron. 88-C(4): 630-638 (2005)

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