"A 45-nm 37.3 GOPS/W Heterogeneous Multi-Core SOC with 16/32 Bit ..."

Osamu Nishii et al. (2011)

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DOI: 10.1587/TRANSELE.E94.C.663

access: closed

type: Journal Article

metadata version: 2021-10-14

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Osamu Nishii, Yoichi Yuyama, Masayuki Ito, Yoshikazu Kiyoshige, Yusuke Nitta, Makoto Ishikawa, Tetsuya Yamada, Junichi Miyakoshi, Yasutaka Wada, Keiji Kimura, Hironori Kasahara, Hideo Maejima:
A 45-nm 37.3 GOPS/W Heterogeneous Multi-Core SOC with 16/32 Bit Instruction-Set General-Purpose Core. IEICE Trans. Electron. 94-C(4): 663-669 (2011)

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