"A Design of High Performance Parallel Architecture and Communication for ..."

Hsuan-Chun Liao et al. (2013)

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DOI: 10.1587/TRANSFUN.E96.A.1222

access: closed

type: Journal Article

metadata version: 2024-08-28

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  - https://dblp.org/rec/journals/ieicet/LiaoAILK13
Hsuan-Chun Liao, Mochamad Asri, Tsuyoshi Isshiki, Dongju Li, Hiroaki Kunieda:
A Design of High Performance Parallel Architecture and Communication for Multi-ASIP Based Image Processing Engine. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 96-A(6): 1222-1235 (2013)

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