"A Fast Gate-Level Register Relocation Method for Circuit Size Reduction in ..."

Yukihide Kohira, Atsushi Takahashi (2008)

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DOI: 10.1093/IETFEC/E91-A.10.3030

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type: Journal Article

metadata version: 2023-05-01

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Yukihide Kohira, Atsushi Takahashi:
A Fast Gate-Level Register Relocation Method for Circuit Size Reduction in General-Synchronous Framework. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 91-A(10): 3030-3037 (2008)

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