"Area-Efficient QC-LDPC Decoder Architecture Based on Stride Scheduling and ..."

Bongjin Kim, In-Cheol Park (2013)

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DOI: 10.1587/TRANSCOM.E96.B.1772

access: closed

type: Journal Article

metadata version: 2024-02-05

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Bongjin Kim, In-Cheol Park:
Area-Efficient QC-LDPC Decoder Architecture Based on Stride Scheduling and Memory Bank Division. IEICE Trans. Commun. 96-B(7): 1772-1779 (2013)

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