"A 40-nm 256-Kb Half-Select Resilient 8T SRAM with Sequential Writing ..."

Shusuke Yoshimoto et al. (2012)

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DOI: 10.1587/ELEX.9.1023

access: open

type: Journal Article

metadata version: 2024-05-07

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  - https://dblp.org/rec/journals/ieiceee/YoshimotoTOSMKY12
Shusuke Yoshimoto, Masaharu Terada, Shunsuke Okumura, Toshikazu Suzuki, Shinji Miyano, Hiroshi Kawaguchi, Masahiko Yoshimoto:
A 40-nm 256-Kb Half-Select Resilient 8T SRAM with Sequential Writing Technique. IEICE Electron. Express 9(12): 1023-1029 (2012)

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