"Circuit level, 32nm, 1-bit MOSSI-ULP adder: power, PDP and area efficient ..."

S. Vijayakumar, Reeba Korah (2014)

> Home

Details and statistics

DOI: 10.1587/ELEX.11.20140109

access: open

type: Journal Article

metadata version: 2021-10-14

- view
  - electronic edition via DOI (open access)
  authority control:
- export record
  dblp key:
  - journals/ieiceee/VijayakumarK14
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/journals/ieiceee/VijayakumarK14
S. Vijayakumar, Reeba Korah:
Circuit level, 32nm, 1-bit MOSSI-ULP adder: power, PDP and area efficient base cell for unsigned multiplier. IEICE Electron. Express 11(6): 20140109 (2014)

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.