"High-speed demonstration of low-power 1 k-bit shift-register memories ..."

Toshihiro Takahashi et al. (2016)

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DOI: 10.1587/ELEX.13.20160074

access: open

type: Journal Article

metadata version: 2021-02-12

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Toshihiro Takahashi, Ryo Numaguchi, Yuki Yamanashi, Nobuyuki Yoshikawa:
High-speed demonstration of low-power 1 k-bit shift-register memories using LR-biasing SFQ circuits. IEICE Electron. Express 13(6): 20160074 (2016)

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