"Optimization of CMOS power-cell layout for improving junction breakdown."

Ockgoo Lee et al. (2014)

> Home

Details and statistics

DOI: 10.1587/ELEX.11.20140523

access: open

type: Journal Article

metadata version: 2021-02-12

- view
  - electronic edition via DOI (open access)
  authority control:
- export record
  dblp key:
  - journals/ieiceee/LeeHAKHYLLL14
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/journals/ieiceee/LeeHAKHYLLL14
Ockgoo Lee, Jeonghu Han, Kyu Hwan An, Hyoungsoo Kim, Joonhui Hur, Kiseok Yang, Kyutae Lim, Chang-Ho Lee, Joy Laskar:
Optimization of CMOS power-cell layout for improving junction breakdown. IEICE Electron. Express 11(19): 20140523 (2014)

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.