"Power-mode-aware buffer synthesis for low-power clock skew minimization."

Shih-Hsu Huang, Chun-Hua Cheng (2016)

> Home

Details and statistics

DOI: 10.1587/ELEX.13.20160511

access: open

type: Journal Article

metadata version: 2021-02-12

- view
  - electronic edition via DOI (open access)
  authority control:
- export record
  dblp key:
  - journals/ieiceee/HuangC16
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/journals/ieiceee/HuangC16
Shih-Hsu Huang, Chun-Hua Cheng:
Power-mode-aware buffer synthesis for low-power clock skew minimization. IEICE Electron. Express 13(14): 20160511 (2016)

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.