"The cache and memory subsystems of the IBM POWER8 processor."

William J. Starke et al. (2015)

> Home

Details and statistics

DOI: 10.1147/JRD.2014.2376131

access: closed

type: Journal Article

metadata version: 2020-03-13

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - journals/ibmrd/StarkeSDDASGMSB15
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/journals/ibmrd/StarkeSDDASGMSB15
William J. Starke, Jeffrey Stuecheli, David Daly, J. S. Dodson, Florian Auernhammer, Patricia Sagmeister, Guy L. Guthrie, Charles F. Marino, M. S. Siegel, Bart Blaner:
The cache and memory subsystems of the IBM POWER8 processor. IBM J. Res. Dev. 59(1) (2015)

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.