"A Circuit Packaging Model for High-Speed Computer Technology."

Fred K. Buelow et al. (1963)

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DOI: 10.1147/RD.73.0182

access: closed

type: Journal Article

metadata version: 2020-03-13

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  - https://dblp.org/rec/journals/ibmrd/BuelowHWZ63
Fred K. Buelow, Frank B. Hartman, E. Leon Willette, John J. Zasio:
A Circuit Packaging Model for High-Speed Computer Technology. IBM J. Res. Dev. 7(3): 182-189 (1963)

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