"High-speed hardware architecture for implementations of multivariate ..."

Haibo Yi, Zhe Nie (2018)

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DOI: 10.1186/S13638-018-1117-2

access: open

type: Journal Article

metadata version: 2020-08-27

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Haibo Yi, Zhe Nie:
High-speed hardware architecture for implementations of multivariate signature generations on FPGAs. EURASIP J. Wirel. Commun. Netw. 2018: 93 (2018)

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