"Performance benchmarking of tunnel transistors for energy efficient 4-bit ..."

Sadulla Shaik, Kalva Sri Rama Krishna (2017)

> Home

Details and statistics

DOI: 10.1504/EG.2017.10006158

access: closed

type: Journal Article

metadata version: 2020-04-25

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - journals/eg/ShaikK17
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/journals/eg/ShaikK17
Sadulla Shaik, Kalva Sri Rama Krishna:
Performance benchmarking of tunnel transistors for energy efficient 4-bit adder architectures at low V_DD. Electron. Gov. an Int. J. 13(4): 356-376 (2017)

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.