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"Enabling Timing Error Resilience for Low-Power Systolic-Array Based Deep ..."
Jeff Zhang et al. (2020)
- Jeff Zhang
, Zahra Ghodsi, Siddharth Garg
, Kartheek Rangineni:
Enabling Timing Error Resilience for Low-Power Systolic-Array Based Deep Learning Accelerators. IEEE Des. Test 37(2): 93-102 (2020)

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