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"Test Cost Reduction Methodology for InFO Wafer-Level Chip-Scale Package."
Kai-Li Wang et al. (2017)
- Kai-Li Wang
, Bing-Yang Lin, Cheng-Wen Wu
, Mincent Lee, Hao Chen, Hung-Chih Lin, Ching-Nen Peng, Min-Jer Wang:
Test Cost Reduction Methodology for InFO Wafer-Level Chip-Scale Package. IEEE Des. Test 34(3): 50-58 (2017)
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