"Saving Power by Synthesizing Gated Clocks for Sequential Circuits."

Luca Benini, Polly Siegel, Giovanni De Micheli (1994)

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DOI: 10.1109/54.329451

access: closed

type: Journal Article

metadata version: 2020-05-17

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Luca Benini, Polly Siegel, Giovanni De Micheli:
Saving Power by Synthesizing Gated Clocks for Sequential Circuits. IEEE Des. Test Comput. 11(4): 32-41 (1994)

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