"An Efficient FPGA Architecture for Reconfigurable FFT Processor ..."

M. S. Kavitha, P. Rangarajan (2020)

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DOI: 10.1007/S00034-020-01436-4

access: closed

type: Journal Article

metadata version: 2023-09-30

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M. S. Kavitha, P. Rangarajan:
An Efficient FPGA Architecture for Reconfigurable FFT Processor Incorporating an Integration of an Improved CORDIC and Radix-2 r Algorithm. Circuits Syst. Signal Process. 39(11): 5801-5829 (2020)

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