"Floorplet: Performance-aware Floorplan Framework for Chiplet Integration."

Shixin Chen et al. (2023)

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DOI: 10.48550/ARXIV.2308.01672

access: open

type: Informal or Other Publication

metadata version: 2024-08-05

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  - journals/corr/abs-2308-01672
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  - https://dblp.org/rec/journals/corr/abs-2308-01672
Shixin Chen, Shanyi Li, Zhen Zhuang, Su Zheng, Zheng Liang, Tsung-Yi Ho, Bei Yu, Alberto L. Sangiovanni-Vincentelli:
Floorplet: Performance-aware Floorplan Framework for Chiplet Integration. CoRR abs/2308.01672 (2023)

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