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"Acceleration for Timing-Aware Gate-Level Logic Simulation with One-Pass ..."

Weijie Fang et al. (2023)

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DOI: 10.48550/ARXIV.2304.13398

access: open

type: Informal or Other Publication

metadata version: 2023-12-31

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  - journals/corr/abs-2304-13398
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  - https://dblp.org/rec/journals/corr/abs-2304-13398
Weijie Fang, Yanggeng Fu, Jiaquan Gao, Longkun Guo, Gregory Z. Gutin, Xiaoyan Zhang:
Acceleration for Timing-Aware Gate-Level Logic Simulation with One-Pass GPU Parallelism. CoRR abs/2304.13398 (2023)

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