"Formal Verification of Arithmetic RTL: Translating Verilog to C++ to ACL2."

David M. Russinoff (2020)

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DOI: 10.4204/EPTCS.327.1

access: open

type: Conference or Workshop Paper

metadata version: 2020-12-10

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  - journals/corr/abs-2009-13761
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  - https://dblp.org/rec/journals/corr/abs-2009-13761
David M. Russinoff:
Formal Verification of Arithmetic RTL: Translating Verilog to C++ to ACL2. ACL2 2020: 1-15

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