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"CLR-DRAM: A Low-Cost DRAM Architecture Enabling Dynamic Capacity-Latency ..."

Haocong Luo et al. (2020)

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DOI: —

access: open

type: Informal or Other Publication

metadata version: 2020-08-13

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  - electronic edition @ arxiv.org (open access)
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  dblp key:
  - journals/corr/abs-2005-12775
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  persistent URL:
  - https://dblp.org/rec/journals/corr/abs-2005-12775
Haocong Luo, Taha Shahroodi, Hasan Hassan, Minesh Patel, Abdullah Giray Yaglikçi, Lois Orosa, Jisung Park, Onur Mutlu:
CLR-DRAM: A Low-Cost DRAM Architecture Enabling Dynamic Capacity-Latency Trade-Off. CoRR abs/2005.12775 (2020)

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