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"Minor-embedding heuristics for large-scale annealing processors with ..."
Yuya Sugie et al. (2020)
- Yuya Sugie, Yuki Yoshida, Normann Mertig, Takashi Takemoto, Hiroshi Teramoto, Atsuyoshi Nakamura, Ichigaku Takigawa, Shin-ichi Minato, Masanao Yamaoka, Tamiki Komatsuzaki:
Minor-embedding heuristics for large-scale annealing processors with sparse hardware graphs of up to 102, 400 nodes. CoRR abs/2004.03819 (2020)
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