"VLSI Implementation of Novel Class of High Speed Pipelined Digital Signal ..."

Rozita Teymourzadeh et al. (2018)

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DOI: —

access: open

type: Informal or Other Publication

metadata version: 2018-08-13

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  - electronic edition @ arxiv.org (open access)
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  dblp key:
  - journals/corr/abs-1807-10309
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  persistent URL:
  - https://dblp.org/rec/journals/corr/abs-1807-10309
Rozita Teymourzadeh, Yazan Samir Algnabi, Masuri Othman, Md. Shabiul Islam, Mok Vee Hong:
VLSI Implementation of Novel Class of High Speed Pipelined Digital Signal Processing Filter for Wireless Receivers. CoRR abs/1807.10309 (2018)

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