"Nanoseconds Timing System Based on IEEE 1588 FPGA Implementation."

Davide Pedretti et al. (2018)

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type: Informal or Other Publication

metadata version: 2024-07-30

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  - journals/corr/abs-1806-04586
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  - https://dblp.org/rec/journals/corr/abs-1806-04586
Davide Pedretti, Marco Bellato, Roberto Isocrate, A. Bergnoli, R. Brugnera, D. Corti, F. Dal Corso, G. Galet, Alberto Garfagnini, Agnese Giaz, I. Lippi, F. Marini, Giuseppe Andronico, Vito Antonelli, M. Baldoncini, E. Bernieri, A. Brigatti, A. Budano, M. Buscemi, S. Bussino, R. Caruso, D. Chiesa, C. Clementi, X. F. Ding, S. Dusini, A. Fabbri, R. Ford, Andrey Formozov, M. Giammarchi, M. Grassi, A. Insolia, P. Lombardi, Fabio Mantovani, S. M. Mari, C. Martellini, Agnese Martini, E. Meroni, Lino Miramonti, Salvatore Monforte, P. Montini, Michele Montuschi, M. Nastasi, F. Ortica, A. Paoloni, E. Previtali, G. Ranucci, A. C. Re, B. Ricci, A. Romani, G. Salamanna, F. H. Sawy, G. Settanta, M. Sisti, C. Sirignano, L. Stanco, Virginia Strati, G. Verde:
Nanoseconds Timing System Based on IEEE 1588 FPGA Implementation. CoRR abs/1806.04586 (2018)

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