"FPGA Implementation of pipeline Digit-Slicing Multiplier-Less Radix 2 ..."

Yazan Samir Algnabi et al. (2018)

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DOI: —

access: open

type: Informal or Other Publication

metadata version: 2018-08-13

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  - electronic edition @ arxiv.org (open access)
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  dblp key:
  - journals/corr/abs-1806-04570
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  persistent URL:
  - https://dblp.org/rec/journals/corr/abs-1806-04570
Yazan Samir Algnabi, Rozita Teymourzadeh, Masuri Othman, Md. Shabiul Islam:
FPGA Implementation of pipeline Digit-Slicing Multiplier-Less Radix 2 power of 2 DIF SDF Butterfly for Fourier Transform Structure. CoRR abs/1806.04570 (2018)

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