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"Minimizing Area and Energy of Deep Learning Hardware Design Using ..."

Shihui Yin et al. (2018)

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DOI: —

access: open

type: Informal or Other Publication

metadata version: 2020-03-11

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  - electronic edition @ arxiv.org (open access)
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  dblp key:
  - journals/corr/abs-1804-07370
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  persistent URL:
  - https://dblp.org/rec/journals/corr/abs-1804-07370
Shihui Yin, Gaurav Srivastava, Shreyas K. Venkataramanaiah, Chaitali Chakrabarti, Visar Berisha, Jae-sun Seo:
Minimizing Area and Energy of Deep Learning Hardware Design Using Collective Low Precision and Structured Compression. CoRR abs/1804.07370 (2018)

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