![](https://dblp.uni-trier.de./img/logo.320x120.png)
![search dblp search dblp](https://dblp.uni-trier.de./img/search.dark.16x16.png)
![search dblp](https://dblp.uni-trier.de./img/search.dark.16x16.png)
default search action
"Effect of Thread Level Parallelism on the Performance of Optimum ..."
Mehdi Alipour, Hojjat Taghdisi (2012)
- Mehdi Alipour, Hojjat Taghdisi:
Effect of Thread Level Parallelism on the Performance of Optimum Architecture for Embedded Applications. CoRR abs/1204.2772 (2012)
![](https://dblp.uni-trier.de./img/cog.dark.24x24.png)
manage site settings
To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.