"High Performance Hybrid Two Layer Router Architecture for FPGAs Using ..."

Periyathambi Ezhumalai et al. (2010)

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DOI: —

access: open

type: Informal or Other Publication

metadata version: 2018-12-03

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  - electronic edition @ arxiv.org (open access)
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  dblp key:
  - journals/corr/abs-1002-2420
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  persistent URL:
  - https://dblp.org/rec/journals/corr/abs-1002-2420
Periyathambi Ezhumalai, S. Manojkumar, C. Arun, P. Sakthivel, D. Sridharan:
High Performance Hybrid Two Layer Router Architecture for FPGAs Using Network On Chip. CoRR abs/1002.2420 (2010)

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