"Higher order and optimized symmetric 2D FIR filter design and hardware ..."

Venkata Krishna Odugu et al. (2024)

> Home

Details and statistics

DOI: 10.1016/J.COMPELECENG.2024.109564

access: closed

type: Journal Article

metadata version: 2024-10-06

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - journals/cee/OduguRGU24
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/journals/cee/OduguRGU24
Venkata Krishna Odugu, B. Janardhana Rao, Harish Babu Gade, Appala Raju Uppala:
Higher order and optimized symmetric 2D FIR filter design and hardware architecture implementation using CSD-CSE. Comput. Electr. Eng. 119: 109564 (2024)

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.