"Equalization of multi-Gb/s chip-to-chip interconnects affected by ..."

Jelle Bailleul et al. (2017)

> Home

Details and statistics

DOI: 10.1016/J.COMPELECENG.2017.07.020

access: closed

type: Journal Article

metadata version: 2023-06-26

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - journals/cee/BailleulJMGM17
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/journals/cee/BailleulJMGM17
Jelle Bailleul, Lennert Jacobs, Paolo Manfredi, Dries Vande Ginste, Marc Moeneclaey:
Equalization of multi-Gb/s chip-to-chip interconnects affected by manufacturing tolerances. Comput. Electr. Eng. 62: 17-28 (2017)

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.