"Debugging VHDL Designs: Introducing Multiple Models and First Empirical ..."

Franz Wotawa (2004)

> Home

Details and statistics

DOI: 10.1023/B:APIN.0000033635.98612.1E

access: closed

type: Journal Article

metadata version: 2017-06-14

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - journals/apin/Wotawa04
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/journals/apin/Wotawa04
Franz Wotawa:
Debugging VHDL Designs: Introducing Multiple Models and First Empirical Results. Appl. Intell. 21(2): 159-172 (2004)

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.