"Designing of 2-Stage CPU Scheduler Using Vague Logic."

Supriya Raheja, Reena Dhadich, Smita Rajpal (2014)

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DOI: 10.1155/2014/841976

access: open

type: Journal Article

metadata version: 2020-07-14

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Supriya Raheja, Reena Dhadich, Smita Rajpal:
Designing of 2-Stage CPU Scheduler Using Vague Logic. Adv. Fuzzy Syst. 2014: 841976:1-841976:10 (2014)

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