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"A 12-bit 1.1GS/s Pipelined-SAR ADC With Adaptive Inter-Stage Redundancy in ..."
Xianshan Wen et al. (2024)
- Xianshan Wen, Tao Fu, Liang Fang, Ping Gui:
A 12-bit 1.1GS/s Pipelined-SAR ADC With Adaptive Inter-Stage Redundancy in 28 nm CMOS. IEEE Access 12: 36951-36960 (2024)
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