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"PipeFL: Hardware/Software co-Design of an FPGA Accelerator for Federated ..."
Zixiao Wang et al. (2022)
- Zixiao Wang, Biyao Che, Liang Guo, Yang Du, Ying Chen, Jizhuang Zhao, Wei He:
PipeFL: Hardware/Software co-Design of an FPGA Accelerator for Federated Learning. IEEE Access 10: 98649-98661 (2022)
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