![](https://dblp.uni-trier.de./img/logo.320x120.png)
![search dblp search dblp](https://dblp.uni-trier.de./img/search.dark.16x16.png)
![search dblp](https://dblp.uni-trier.de./img/search.dark.16x16.png)
default search action
"Practical Full Chip Clock Distribution Design With a Flexible Topology and ..."
Eng Keong Teh et al. (2021)
- Eng Keong Teh
, Mohamad Adzhar Md Zawawi
, Mohamed Fauzi Packeer Mohamed
, Nor Ashidi Mat Isa
:
Practical Full Chip Clock Distribution Design With a Flexible Topology and Hybrid Metaheuristic Technique. IEEE Access 9: 14816-14835 (2021)
![](https://dblp.uni-trier.de./img/cog.dark.24x24.png)
manage site settings
To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.