"Parallel logic level simulation of VLSI circuits."

Rajive L. Bagrodia et al. (1994)

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DOI: 10.1109/WSC.1994.717530

access: closed

type: Conference or Workshop Paper

metadata version: 2021-06-10

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Rajive L. Bagrodia, Zheng Li, Vikas Jha, Yuan Chen, Jason Cong:
Parallel logic level simulation of VLSI circuits. WSC 1994: 1354-1361

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