"An Adaptive-Rate Error Correction Scheme for NAND Flash Memory."

Te-Hsuan Chen et al. (2009)

> Home

Details and statistics

DOI: 10.1109/VTS.2009.24

access: closed

type: Conference or Workshop Paper

metadata version: 2023-09-30

- view
  authority control:
- export record
  dblp key:
  - conf/vts/ChenHHW09
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/conf/vts/ChenHHW09
Te-Hsuan Chen, Yu-Ying Hsiao, Yu-Tsao Hsing, Cheng-Wen Wu:
An Adaptive-Rate Error Correction Scheme for NAND Flash Memory. VTS 2009: 53-58

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.