"A 79.3fsrms Jitter Fractional-N Digital PLL Based on a DTC Chopping Technique."

Riccardo Moleri et al. (2024)

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DOI: 10.1109/VLSITECHNOLOGYANDCIR46783.2024.10631343

access: closed

type: Conference or Workshop Paper

metadata version: 2024-10-17

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Riccardo Moleri, Simone Mattia Dartizio, Michele Rossoni, Giacomo Castoro, Francesco Tesolin, Dmytro Cherniak, Carlo Samori, Andrea Leonardo Lacaita, Salvatore Levantino:
A 79.3fsrms Jitter Fractional-N Digital PLL Based on a DTC Chopping Technique. VLSI Technology and Circuits 2024: 1-2

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