"4 GHz 130nm Low Voltage PLL Based on Self Biased Technique."

Biju Viswanathan et al. (2010)

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DOI: 10.1109/VLSI.DESIGN.2010.21

access: closed

type: Conference or Workshop Paper

metadata version: 2024-10-06

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Biju Viswanathan, Vijay Viswam, R. Kulanthaivelu, Joseph J. Vettickatt, S. R. Ramya Nair, Lekshmi S. Chandran:
4 GHz 130nm Low Voltage PLL Based on Self Biased Technique. VLSI Design 2010: 330-334

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